- Microsoft positions self-developed Maia chips as the main inference hardware by 2027 at gigawatt scale
- Maia 200 is already live in Copilot, claiming 1.7x better energy efficiency (Tokens/Watt) than leading GPUs
- CEO Satya Nadella describes this as Microsoft's biggest bet yet on its own silicon
AI CURATED HOT STORY · 10/12/2026
Microsoft Unveils Maia 300 Chip: Achieves 40% Higher Token Throughput per Megawatt via TSMC N2P Multi-Chiplet Architecture, Set to Replace Nvidia in 2027
Microsoft CEO Satya Nadella officially announced the third-generation Maia 300 AI inference chip, scheduled for full deployment by 2027 to replace Nvidia and AMD hardware as Azure's core infrastructure. Built on TSMC's N2P 2nm process with a multi-chiplet design, it claims 40% higher token throughput per megawatt compared to mainstream GPUs, aiming to significantly reduce large-scale inference costs by addressing data movement bottlenecks.
Technically, Maia 300 features 288GB of HBM4 memory across 8 stacks, delivering 18TB/s bandwidth and 13.8 PFLOPS FP4 compute at 950W. Optimized for long-context reasoning and agentic tasks, it integrates 96 accelerators per rack, achieving 7x better token processing efficiency than its predecessor, Maia 200. The latter is already supporting Copilot with 1.7x better energy efficiency than standard GPUs, validating Microsoft's custom silicon strategy.
This move represents Microsoft's biggest bet on self-developed chips, seeking independence from third-party GPUs by building gigawatt-scale autonomous inference clusters. As production nears in 2027, Maia 300 will reshape cloud hardware competition, driving AI infrastructure toward specialized high-efficiency inference and impacting developer ecosystems and supply chains.
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Total 5 reports · Latest first- The DecoderT2·78 pts
- Hacker News AIT2·48 pts
- Azure Maia 300 emphasizes system-level co-design from chip to datacenter rather than just hardware upgrades.
- The architecture is specifically optimized for arithmetic intensity profiles of agentic workloads like long-context and tool use.
- Core goal is maximizing intelligence per watt/dollar by minimizing data movement within fixed power and cooling constraints.
- IT之家 · 智能时代T2·78 pts
- Built on TSMC's N2P 2nm process with a multi-chiplet architecture separating compute, memory, and I/O.
- Features 8 stacks of HBM4 memory totaling 288GB with 18TB/s bandwidth, optimized for large model inference.
- Delivers 13.8 PFLOPS FP4 compute power at a 950W rated TDP, supporting up to 96 chips per rack.
- Rohan Paul (@rohanpaul_ai)T2·86 pts
- Microsoft plans to fully transition to its in-house Maia 300 as the primary inference chip by 2027, directly replacing NVIDIA and AMD solutions.
- The Maia 300 utilizes a multi-chiplet architecture focused on solving data movement bottlenecks, claiming 40% better energy efficiency than leading GPU systems.
- Designed specifically for long-context, low-latency chat, and multi-step agent tasks, it delivers up to 7x higher token throughput per rack compared to the previous generation.
- The Verge AIT2·78 pts
- Maia 300 is positioned as Microsoft's primary AI inference system rather than a general-purpose training chip.
- Key metric shows a 40% improvement in energy efficiency (tokens per megawatt) over leading GPU systems, significantly reducing large-scale inference costs.
- The architecture is specifically optimized for long-context reasoning, low-latency conversational experiences, and multi-step agentic tasks.
- Production deployment in Azure is expected to begin in 2027, reflecting the timeline from experimental silicon to scaled infrastructure.